A Time-Area-Efficient and Compact ECSM Processor over GF(p)

The elliptic curve scalar multiplication (ECSM) is the core of elliptic curve cryptography (ECC), which directly determines the performance of ECC. In this paper, a novel time-area-efficient and compact design of a 256-bit ECSM processor over GF( p ) for the resource-constrained device is proposed, where p can be selected flexibly according to the application scenario. A compact and efficient 256-bit modular adder/subtractor and an improved 256-bit Montgomery multiplier are designed. We select Jacobian coordinates for point doubling and mixed Jacobian-affine coordinates for point addition. We have improved the binary expansion algorithm to reduce 75% of the point addition operations. The clock consumption of each module in this architecture is constant, which can effectively resist side-channel attacks. Reuse technology is adopted in this paper to make the overall architecture more compact and efficient. The design architecture is implemented on Xilinx Kintex-7 (XC7K325T-2FFG900I), consuming 1439 slices, 2 DSPs, and 2 BRAMs. It takes about 7.9 ms at the frequency of 222.2 MHz and 1763k clock cycles to complete once 256-bit ECSM operation over GF( p ).