Design and Optimization of a Low-Noise Voltage Reference Using Chopper Stabilization Technique
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Graphical Abstract
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Abstract
A low-noise voltage reference is presented to enhance resolution of MEMS capacitive accelerometer and reduce system noise, in which the circuit uses Chopper stabilization (CHS) technique for the suppression of low-frequency noise. A 3.7V voltage reference chip is fabricated in a 0.5-μm CMOS process. Compared with the voltage reference without using CHS, the proposed design is much more superior in low-noise performance. Experimental results indicate that the output noise of reference voltage VRP can reach 0.121μV/sqrt(Hz) at the vicinity of 3Hz.
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